r/FPGA•
ArthurMurugan99

Career as a Digital Design Engineer in Memory subsystem domain

Hi everyone,

I'm a recent grad in IC design starting as a Digital Design Engineer at a major semiconductor company. My role sits within the SoC design team, specifically working on NVM controller design.

I have a long-term goal of moving into compute-oriented design work, specifically CPU microarchitecture .

My specific questions:

  1. How do hiring managers at compute-focused teams (CPU, cache, AI accelerator) evaluate candidates coming from NVM backgrounds?

  2. What skills from NVM design transfer directly to compute-oriented work, and what are the genuine gaps I would need to fill?

I've seen the argument that NVM is mature technology compared to cache/SRAM design, but I want to understand whether that actually closes doors or whether it depends on how you develop within the role.

Thanks

Posted Jun 25, 2026, 5:02 PM UTC

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