>However, the new patches suggest that Intel has now mandated native 512-bit execution across both P-cores and E-cores, no longer requiring the latter to step down and process the data a bit slower. This is a major development over the standard we originally expected Intel to adopt; the E-cores are apparently becoming just as performant as the P-cores when it comes to SIMD instructions with Nova Lake and later.

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>The last time we saw native AVX-512 support on an Intel client family was Rocket Lake (11th Gen), right before the hybrid era ushered in by Alder Lake. For modern AI workloads and other compute-heavy tasks such as encoding or simulations, AVX-512 instructions bring a huge performance benefit that's foolish to be left on the table. Keep in mind that this is just a Linux patch at the moment and that Intel hasn't officially announced native AVX-512 support for Nova Lake yet.









AVX-512 support is reportedly returning with Intel's next-gen Nova Lake CPUs — Latest Linux kernel patches reveal P-cores and E-cores will gain native 512-bit execution