r/chipdesign•
Georgiou1226

How much conductance variation can an analog MAC array absorb before the network breaks?

I've been trying to pin down the practical noise budget for analog in-memory computing, coming at it from the algorithm side rather than the device side, and I ran a simulation to get a feel for it.

Setup is a small network evaluated through progressively noisier weights, Gaussian perturbation standing in for cell-to-cell conductance variation, sweeping the magnitude.

I expected accuracy to fall roughly in proportion to noise. It doesn't. It stays essentially flat, then drops off a cliff inside a narrow band and lands at near-random. Retraining the same architecture with noise injected during training rather than only at inference shifts that threshold by a lot.

What I can't answer is whether any of this maps onto real silicon. My noise model is independent additive Gaussian, which ignores drift, retention loss, programming asymmetry, and correlated variation across a crossbar. If you work with these arrays, does the sharp threshold match what you see, or does realistic device physics smear it into something gentler?

Numbers, code and plots here: https://towardsdatascience.com/analog-ai-is-back-can-it-survive-its-own-noise/

Posted Aug 11, 2026, 11:14 AM UTC

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