r/RISCV•
fpedroni

Mapped encoding conflicts across 102 RISC-V extensions: 27 fatal collisions, vendor extensions all fighting over custom-0

https://preview.redd.it/vqxgp386ek6h1.png?width=1017&format=png&auto=webp&s=f47273eba80142b340790f41487fd7b1811fed60

Built from the registry's conflict detector. Every edge is an encoding collision between two extensions.

The red cluster is: FATAL same opcode, different instruction.

The custom-space cluster (67 warnings) is everyone reaching for custom-0.

Interactive: extensilica.com/compatibility

=============================================

EDIT (June 11, 2026): brucehoult and XIVN1987 correctly identified that shared major opcodes (like every RVV instruction sitting at OP-V 0x57) were being reported as FATAL conflicts on the compatibility graph. That was a too-coarse classification on my end.

Fix is live: those edges now read as INFO ("shared major opcode; not a conflict by itself. A true conflict requires overlapping full decode mask/match patterns, including any fixed register/immediate field constraints"). Full mask/match resolution (funct6, vm, register/immediate carve-outs) is the next iteration.

See https://extensilica.com/compatibility for the updated graph; technical details in the comments below.

https://preview.redd.it/4ronr0wm7o6h1.png?width=1018&format=png&auto=webp&s=783b7f1031a14f969bc67365b695ec04b4d02861

Posted Jun 11, 2026, 2:28 AM UTC

012
Loading comments…